A flash memory cell is a type of non-volatile memory (NVM) cell that stores charge on a floating gate. The amount of charge on the floating gate determines a threshold voltage (VT) of the cell, hence the logic state stored by the cell. Each time the cell is programmed or erased; electrons are moved to or from the floating gate. The floating gate is electrically isolated so that charge is stored indefinitely. However, after a number of program and erase cycles, the floating gate begins to lose its ability to store charge. The cells of a flash memory array do not generally have the same life expectancy with respect to the number of program and erase operations they can endure. Flash memory cells are typically grouped together in blocks of cells, and a flash memory array is erased by erasing an entire group, or block, of memory cells at the same time. With increasing program and erase cycles, the overall VT distribution of the cells in the block tends to broaden. Also, the erase rate may change. The blocks are not usually subjected to the same number of program and erase operations so the VT distributions of the blocks widen at different rates. Consequently, the amount of time required to erase a block increases because more time is required to converge the VT distribution to within a desired VT range. The result is inconsistent erase times for different memory cell blocks of the flash memory.
Therefore, it is desirable to provide a flash memory array that provides reliable erase operations even when as the number of program and erase cycles increase and are inconsistent between blocks.